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APL5156
High Input Voltage, Low Quiescent Current, 150mA LDO Regulator
Features
* * * * * * * * * * * * * * * *
Wide Operating Voltage : 6.5V~25V Ultra Low Ground Current : 70A High Output Accuracy : 2% Over Temperature Excellent Load/Line Transient Low Dropout Voltage : 1900mv @ 150mA Fixed Output Voltages for 5V/3.3V or Adjustable Voltage Built-In Reverse Battery Protection Built-In Reverse Leakage Protection Built-In Current-Limit Protection Built-In Over-Temperature Protection Zero Shutdown Current Internal Soft-Start Function 0.5ms~1.5ms (max) Over Temperature POR Scheme to Prevent VOUT Spike Stable with Aluminum, Tantalum, or Ceramic Capacitors SOT-23-5, SOT-89, and SOP-8P Packages Lead Free and Green Devices Available (RoHS Compliant)
General Description
The APL5156 is a low ground current linear regulator, which operates with input voltage from 6.5V to 25V and delivers output current up to 150mA. Typical dropout voltage is only 1.9V at 150mA loading. This combination of the high voltage and the low ground current makes the APL5156 ideal for USB and portable devices, using 2cell or 3-cell Li-Ion battery inputs. The APL5156 is stable with aluminum, tantalum, and ceramic capacitors. It requires a 2.2F or greater capacitor for stability. The APL5156 has many protection functions, including over-temperature, current-limit, reverse battery, and reverse leakage protections which prevent the device from thermal over-load, current over-load, reverse connection of the battery and output current reversing to the VIN. The APL5156 regulator is available in miniature SOT-235, SOT-89, and SOP-8P packages.
Simplified Application Circuit
VIN VOUT
Applications
* * * *
USB Power Supply Keep-Alive Supply in Notebook and Portable Computers Logic Supply for High-Voltage Batteries Battery Powered Systems
APL5156
CIN
1
EN GND
ADJ
COUT
2.2
Adjustable Output Voltage (SOT-23-5/SOP-8P)
Pin Configuration
SOT-23-5 VIN 1 GND 2 EN 3 5 VOUT 4 NC/ADJ GND 1 VIN 2 VOUT 3 TAB: VIN SOT-89 VOUT NC NC NC/ADJ 1 2 3 4 SOP-8P 8 7 6 5 VIN GND NC EN
Thermal Pad (connected to GND plane for better dissipation)
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright (c) ANPEC Electronics Corp. Rev. A.6 - Oct., 2009 1 www.anpec.com.tw
APL5156
Ordering and Marking Information
APL5156 Assembly Material Handling Code Temperature Range Package Code Voltage Code Package Code B : SOT-23-5 D : SOT-89 KA : SOP-8P Operating Ambient Temperature Range I : -40 to 85 oC Handling Code TR : Tape & Reel Voltage Code : 33 : 3.3V 50 : 5.0V Blank : Adjustable Version Assembly Material G : Halogen and Lead Free Device X - Date Code
APL5156
B:
L56X
APL5156
33B :
56RX 56ZX APL5156 XXXXX33 APL5156 XXXXX
X - Date Code
;
33 - 3.3V
APL5156
50B :
X - Date Code ;
50 - 5.0V
APL5156
D:
XXXXX - Date Code
;
33 - 3.3V
APL5156
KA :
XXXXX - Date Code
Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for MSL classification at lead-free peak reflow temperature. ANPEC defines "Green" to mean lead-free (RoHS compliant) and halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by weight).
Absolute Maximum Ratings
Symbol VIN,VEN VIN, EN to GND Voltage EN to VIN Voltage VOUT,VADJ VOUT, ADJ to GND Voltage VOUT, ADJ to VIN Voltage PD TJ TSTG TSDR Power Dissipation Operating Junction Temperature Storage Temperature Range
(Note 1)
Rating - 27 to 27 -27 to 27 - 0.3 to 27 -27 to 27 Internally Limited -40 to 125 -65 to +150 260 Unit V V V V W
o o o
Parameter
C C C
Maximum Lead Soldering Temperature, 10 Seconds
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Thermal Characteristics
Symbol Parameter Thermal Resistance-Junction to Ambient (Note 2) JA SOT-23-5 SOT-89 SOP-8P 235 180 50
o
Typical Value
Unit
C/W
Copyright (c) ANPEC Electronics Corp. Rev. A.6 - Oct., 2009
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APL5156
Thermal Characteristics (Cont.)
Symbol Parameter Thermal Resistance-Junction to Case 130 SOT-23-5 38 SOT-89 20 SOP-8P Note 2: JA is measured with the component mounted on a high effective thermal conductivity test board in free air. JC
o
Typical Value
Unit
C/W
Electrical Characteristics
Unless otherwise noted, these specifications apply over VIN=VOUT+2.5V, CIN=1F, COUT=2.2F, TA=-40oC to 85oC. Typical values refer to TA=25oC. Symbol VIN VOUT Parameter Input Voltage Output Voltage Accuracy Output Voltage Range IOUT=0.1mA IQ Quiescent Current IOUT=50mA IOUT=100mA IOUT=150mA IOUT VREF REGLINE REGLOAD Load Current Range Reference Voltage Line Regulation Load Regulation VOUT+2.5Vo
Test Conditions
APL5156 Min. 6.5 -2 3 0 -2% 4 Typ. 70 0.5 2 5 1.24 0.01 0.4 1300 1600 1700 1900 5 Max. 25 2 20 100 1 3.5 7 150 +2% 1 1900 2000 2100 2300 6
Unit V % V A mA mA mA mA V % %
mV
V C C
o
mA mA A mA
Copyright (c) ANPEC Electronics Corp. Rev. A.6 - Oct., 2009
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APL5156
Typical Operating Characteristics
PSRR vs. Frequency
0 IOUT =100mA
2 2.5
Dropout Voltage vs. Output Current
TA=25X C
Dropout Voltage (V)
100K
-20
PSRR (dB)
1.5
-40
IOUT =10mA
1
-60
0.5
-80 10
0
100
1K
10K
0
20
40
60
80
100
120
140
Frequency (Hz)
Output Current (mA)
Dropout Voltage vs. Temperature
2.5 IOUT=150mA 2 5000 6000
Quiescent Current vs. Output Current
VIN=6V
Quiescent Current (A)
Dropout Voltage (V)
4000 3000 2000
1.5
1
0.5
1000 0
0 -40
-20
0
20
40
60
o
80
100 120
0
20
40
60
80
100
120
140
Temperature ( C)
Output Current (mA)
Quiescent Current vs. Temperature
90 85
IOUT=10mA 90 100
Quiescent Current vs. Input Voltage
IOUT=10mA
Quiescent Current (A)
80 75 70 65 60 55 50 -40
Quiescent Current (A)
80 70
60 50
40
-20
0
20
40
60
o
80
100
120
6
8
10
12
14
16
18
20
22
24
Temperature ( C) Copyright (c) ANPEC Electronics Corp. Rev. A.6 - Oct., 2009 4
Input Voltage (V) www.anpec.com.tw
APL5156
Typical Operating Characteristics (Cont.)
Output Voltage vs. Temperature 3.4 3.35 Output Voltage (V) 3.3 3.25 3.2 3.15 3.1 -40 -20 0
20 40
60 80 100 120
o( TemperatureC)
Copyright (c) ANPEC Electronics Corp. Rev. A.6 - Oct., 2009
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APL5156
Operating Waveforms
Load Transient
=12 ; =3.3 ; ; =1 =2.2
Line Transient
(100/)
=11.512.5
; =1
(1150)
(200/) ; ; =2.2 =10
(50 /)
(50 /)
Entering Shutdown Delay
; =6 =1 ; ; =2.2 =100
Exiting Shutdown Waveform
VIN =6V ; C =1 ; ; =2.2 =100 IN
(2/)
(2/)
(2/)
(2/)
Time (0.5ms/div)
Time (0.5ms/div)
Copyright (c) ANPEC Electronics Corp. Rev. A.6 - Oct., 2009
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APL5156
Pin Description
PIN NO. SOT-23-5 1 2 3 4 5 SOT-89 2 1 3 SOP-8P 8 7 5 4 1 NAME VIN GND EN NC/ADJ VOUT Voltage supply input pin Ground Enable pin, Logic low=shutdown; Logic high=enable NC: No Connection ADJ: Output voltage feedback pin Regulator output pin FUNCTION
Block Diagram
VIN VOUT
EN
ENABLE R1 VREF
ADJ
R2
Adjustable Output Voltage (SOT-23-5/SOP-8P) GND
VIN
VOUT
EN
ENABLE R1
VREF R2
Fixed Output Voltage (SOT-23-5/SOP-8P) GND
Copyright (c) ANPEC Electronics Corp. Rev. A.6 - Oct., 2009 7 www.anpec.com.tw
APL5156
Block Diagram (Cont.)
VIN
VOUT
R1 VREF
R2
Fixed Output Voltage (SOT-89)
GND
Typical Application Circuit
VIN CIN
1
VOUT COUT 2.2
EN GND
ADJ

Adjustable Output Voltage (SOT-23-5/SOP-8P)
VIN VOUT COUT
CIN
1
EN GND
NC
2.2

Fixed Output Voltage (SOT-23-5/SOP-8P)
VIN CIN
1
VOUT COUT
2.2
GND
Fixed Output Voltage (SOT-89)
Copyright (c) ANPEC Electronics Corp. Rev. A.6 - Oct., 2009
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APL5156
Application Information
Enable/Shutdown The APL5156 features an active-high enable pin that allows the regulator to be disabled. Forcing the enable pin low disables the regulator, so current consumed by the regulator goes nearly to zero. Forcing the enable pin high enables the output voltage. The enable pin can not float. Input Capacitor The APL5156 has high input voltage up to 25V. The input capacitor must be rated to sustain voltages that may be used on the input. An input capacitor may be required when the device is not near the source power supply or when supplied by a battery. Small and surface-mounted ceramic capacitors can be used for bypassing. A larger value may be required if the source supply has high ripple. Output Capacitor The APL5156 requires an output capacitor for stability. The design requires 2.2F or greater on the output to maintain stability. It is optimized by using low-ESR ceramic chip capacitors. The maximum allowable ESR is 3. More capacitance improves transient response. Place the output capacitor as close to the VOUT pin as possible. X7R/X5R dielectric-type ceramic capacitors are recommended because of their temperature performance. X7R type capacitors change capacitance by 15% over their operating temperature ranges. To use a ceramic chip capacitor with Y5V dielectric, the value must be much higher than an X7R ceramic capacitor to ensure the same minimum capacitance over the equivalent operating temperature range. No-Load Stability The APL5156 will remain stable and in regulation with no load unlike many other voltage regulators. This is especially important in CMOS RAM keep-alive applications. Thermal Consideration The thermal resistance of junction to ambient controls the APL5156's maximum power dissipation. The power dissipation across the device is PD=IOUT (VIN-VOUT), and the maximum power dissipation is:
0.150
PD(MAX ) =
TJ - TA JA
where TJ-TA is the temperature difference between the junction and ambient air. JA is the thermal resistance between junction and ambient air. For continual operation, do not exceed the absolute maximum junction temperature rating of TJ=125 C. For example: In SOT-23-5 package JA=235 C/W. When operates the o APL5156 at TA=50 C, the maximum power dissipation can be determined as below: PD(MAX)=(125 C-50 C)/(235 C/W) PD(MAX)=319.1mW Thermal Pad Consideration The SOP-8P is a cost-effective package which features a small size, like a standard SOP-8, and a bottom thermal pad to minimize the thermal resistance of the package is applicable to high current applications. The thermal pad must be soldered down to the copper plane on circuit board. Heat can be conducted away from the thermal pad through the copper plane to ambient. If the copper plane is not on the top surface of the circuit board, 4 or 6 vias should be used to thermally couple the thermal pad to the bottom plane. For good thermal conduction, the vias must be plated through and solder filled. The copper plane used to conduct heat away from the thermal pad should be as large as practical.
0.072 0.118 0.024
o o o o o
0.212
ground plane for thermal pad
SOP-8P Layout Recommendation
Copyright (c) ANPEC Electronics Corp. Rev. A.6 - Oct., 2009
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APL5156
Application Information (Cont.)
Adjustable Regulator Application The output voltage of APL5156 can be adjusted from 3V to 20V by using two external resistors. The resistors set the output voltage based on the following equation: SOP-8P
0.024 0.072 8 7 6 5
R VOUT = VREF 1 + 1 R 2
where VREF=1.24V

0.212
0.138 0.118 1 2 0.050 3 4 Unit : Inch
Feedback resistor R2 should be larger than 100k and smaller than 1M. The resistors should be placed as close the device as possible to avoid noise. Recommended Minimum Footprint SOT-23-5
0.076
0.1
0.038
0.02 Unit : Inch
SOT-89
0.076
0.104
0.140
0.059
0.022 Unit : Inch
Copyright (c) ANPEC Electronics Corp. Rev. A.6 - Oct., 2009
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0.05
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APL5156
Package Information
SOT-23-5
D e
SEE VIEW A
E1
b e1
E
c
0.25
GAUGE PLANE SEATING PLANE VIEW A SOT-23-5 INCHES MIN. MAX. 0.057 0.000 0.035 0.012 0.003 0.106 0.102 0.055 0.037 BSC 0.075 BSC 0.60 8 0.012 0 0.024 8 0.006 0.051 0.020 0.009 0.122 0.118 0.071 MAX. 1.45 0.15 1.30 0.50 0.22 3.10 3.00 1.80
A2 A1
A
S Y M B O L A A1 A2 b c D E E1 e e1 L 0
MILLIMETERS MIN.
0.00 0.90 0.30 0.08 2.70 2.60 1.40 0.95 BSC 1.90 BSC 0.30 0
Note : 1. Follow JEDEC TO-178 AA. 2. Dimension D and E1 do not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil per side.
Copyright (c) ANPEC Electronics Corp. Rev. A.6 - Oct., 2009
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APL5156
Package Information
SOT-89
D D1
A C
E
e e1
B1 S Y M B O L A B B1 C D D1 E E1 e e1 H L 3.94 0.89
B SOT-89 MILLIMETERS INCHES MIN. 0.055 0.017 0.014 0.014 0.173 0.064 0.090 0.084 0.059 BSC 0.118 BSC 4.25 1.20 0.155 0.035 0.167 0.047 MAX. 0.063 0.022 0.019 0.017 0.181 0.072 0.102 0.090
MIN. 1.40 0.44 0.36 0.35 4.40 1.62 2.29 2.13 1.50 BSC 3.00 BSC
MAX. 1.60 0.56 0.48 0.44 4.60 1.83 2.60 2.29
Note : Follow JEDEC TO-243 AA.
Copyright (c) ANPEC Electronics Corp. Rev. A.6 - Oct., 2009
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12
H
E1
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APL5156
Package Information
SOP-8P
D SEE VIEW A D1
THERMAL PAD
E2
E1
E
h X 45o
e
b
c
A2
A
A1
0.25 GAUGE PLANE SEATING PLANE L VIEW A S Y M B O L A A1 A2 b c D D1 E E1 E2 e h L 0 0.25 0.40 0C
o
SOP-8P MILLIMETERS MIN. MAX. 1.60 0.00 1.25 0.31 0.17 4.80 2.50 5.80 3.80 2.00 1.27 BSC 0.50 1.27 8C
o
MIN.
INCHES MAX. 0.063 0.000 0.049 0.51 0.25 5.00 3.50 6.20 4.00 3.00 0.012 0.007 0.189 0.098 0.228 0.150 0.079 0.050 BSC 0.010 0.016 0C
o
0.15
0.006
0.020 0.010 0.197 0.138 0.244 0.157 0.118
0.020 0.050 8oC
Note : 1. Followed from JEDEC MS-012 BA. 2. Dimension "D" does not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 6 mil per side . 3. Dimension "E" does not include inter-lead flash or protrusions. Inter-lead flash and protrusions shall not exceed 10 mil per side.
Copyright (c) ANPEC Electronics Corp. Rev. A.6 - Oct., 2009
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APL5156
Carrier Tape & Reel Dimensions
OD0 P0 P2 P1 A E1 F K0 B SECTION A-A T B0 A0 OD1 B A SECTION B-B
d
Application
A 178.0O .00 2
H 50 MIN. P1 4.0O .10 0 H 50 MIN. P1 8.0O .10 0 H 50 MIN. P1 8.0O .10 0
H A
T1
T1 8.4+2.00 -0.00 P2 2.0O .05 0 T1 12.4+2.00 -0.00 P2 2.0O .05 0 T1 12.4+2.00 -0.00 P2 2.0O .05 0
C 13.0+0.50 -0.20 D0 1.5+0.10 -0.00 C 13.0+0.50 -0.20 D0 1.5+0.10 -0.00 C 13.0+0.50 -0.20 D0 1.5+0.10 -0.00
d 1.5 MIN. D1 1.0 MIN. d 1.5 MIN. D1 1.5 MIN. d 1.5 MIN. D1 1.5 MIN.
D 20.2 MIN. T 0.6+0.00 -0.40 D 20.2 MIN. T 0.6+0.00 -0.40 D 20.2 MIN. T 0.6+0.00 -0.40
W 8.0O .30 0 A0 3.20O .20 0 W 12.0O .30 0 A0 4.80O .20 0 W 12.0O .30 0 A0 6.40O .20 0
W
E1 1.75O .10 0 B0 3.10O .20 0 E1 1.75O .10 0 B0 4.50O .20 0 E1 1.75O .10 0 B0 5.20O .20 0
F 3.5O .05 0 K0 1.50O .20 0 F 5.50O .05 0 K0 1.80O .20 0 F 5.5O .05 0 K0 2.10O .20 0 (mm)
SOT-23-5
P0 4.0O .10 0
Application
A 178.0O .00 2
SOT-89
P0 4.0O .10 0
Application
A 330.0O .00 2
SOP-8P
P0 4.0O .10 0
Copyright (c) ANPEC Electronics Corp. Rev. A.6 - Oct., 2009
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APL5156
Devices Per Unit
Package Type SOT-23-5 SOT-89 SOP-8P Unit Tape & Reel Tape & Reel Tape & Reel Quantity 3000 1000 2500
Taping Direction Information
SOT-23-5
USER DIRECTION OF FEED
SOT-89
USER DIRECTION OF FEED
Copyright (c) ANPEC Electronics Corp. Rev. A.6 - Oct., 2009
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APL5156
Taping Direction Information
SOP-8P
USER DIRECTION OF FEED
Classification Profile
Copyright (c) ANPEC Electronics Corp. Rev. A.6 - Oct., 2009
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APL5156
Classification Reflow Profiles
Profile Feature Preheat & Soak Temperature min (Tsmin) Temperature max (Tsmax) Time (Tsmin to Tsmax) (ts) Average ramp-up rate (Tsmax to TP) Liquidous temperature (TL) Time at liquidous (tL) Peak package body Temperature (Tp)* Time (tP)** within 5C of the specified classification temperature (Tc) Average ramp-down rate (Tp to Tsmax) Time 25C to peak temperature Sn-Pb Eutectic Assembly 100 C 150 C 60-120 seconds 3 C/second max. 183 C 60-150 seconds See Classification Temp in table 1 20** seconds 6 C/second max. 6 minutes max. Pb-Free Assembly 150 C 200 C 60-120 seconds 3C/second max. 217 C 60-150 seconds See Classification Temp in table 2 30** seconds 6 C/second max. 8 minutes max.
* Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum. ** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum. Table 1. SnPb Eutectic Process - Classification Temperatures (Tc) Package Thickness <2.5 mm 2.5 mm
3 3 3
Volume mm <350 235 C 220 C
Volume mm 350 220 C 220 C
3
Table 2. Pb-free Process - Classification Temperatures (Tc) Package Thickness <1.6 mm 1.6 mm - 2.5 mm 2.5 mm Volume mm <350 260 C 260 C 250 C Volume mm 350-2000 260 C 250 C 245 C Volume mm >2000 260 C 245 C 245 C
3
Reliability Test Program
Test item SOLDERABILITY HOLT PCT TCT HBM MM Latch-Up Method JESD-22, B102 JESD-22, A108 JESD-22, A102 JESD-22, A104 MIL-STD-883-3015.7 JESD-22, A115 JESD 78 Description 5 Sec, 245C 1000 Hrs, Bias @ 125C 168 Hrs, 100%RH, 2atm, 121C 500 Cycles, -65C~150C VHBMU2KV VMMU200V 10ms, 1trU 100mA
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APL5156
Customer Service
Anpec Electronics Corp. Head Office : No.6, Dusing 1st Road, SBIP, Hsin-Chu, Taiwan Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 2F, No. 11, Lane 218, Sec 2 Jhongsing Rd., Sindian City, Taipei County 23146, Taiwan Tel : 886-2-2910-3838 Fax : 886-2-2917-3838
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